EN25S64-104HIP
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  • EN25S64-104HIP

Cfeon EN25S64-104HIP

Cfeon EN25QH64 SOIC (200 mils) 1.8v

Atenção - Só alguns gravadores suportam este chip 

Gravador TL866II Plus só funciona com app ver 11.71 Firmware 04.2.128 ou superior

CFEON EN25QH64 QH64-104HIP 64 MEGABIT SERIAL FLASH MEMORY IC CHIP

 

GENERAL DESCRIPTION
The EN25S64 is a 64 Megabit (8,192K-byte) Serial Flash memory, with advanced write protection
mechanisms. The EN25S64 supports the standard Serial Peripheral Interface (SPI), and a high
performance Dual output as well as Dual, Quad I/O using SPI pins: Serial Clock, Chip Select, Serial
DQ0 (DI) and DQ1(DO), DQ2(WP#) and DQ3(NC). SPI clock frequencies of up to 80MHz are supported
allowing equivalent clock rates of 160MHz for Dual Output and 320MHz for Quad Output when using
the Dual/Quad Output Fast Read instructions. The memory can be programmed 1 to 256 bytes at a
time, using the Page Program instruction.
The EN25S64 also offers a sophisticated method for protecting individual blocks against erroneous or
malicious program and erase operations. By providing the ability to individually protect and unprotect
blocks, a system can unprotect a specific block to modify its contents while keeping the remaining
blocks of the memory array securely protected. This is useful in applications where program code is
patched or updated on a subroutine or module basis or in applications where data storage segments
need to be modified without running the risk of errant modifications to the program code segments.
The EN25S64 is designed to allow either single Sector/Block at a time or full chip erase operation. The
EN25S64 can be configured to protect part of the memory as the software protected mode. The device
can sustain a minimum of 100K program/erase cycles on each sector or block.

 

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s64-104hip